Tutorials in Communication and Signal Processing

Tutorial 1 - Basic concepts in signal analysis, power, energy and spectrum (Revised Oct 2008)

Tutorial 2 - What is Differential Phase Shift Keying

Tutorial 3 - What is the DVB-S standard, a simplified version

Tutorial 4 - Fourier Analysis Made easy - Part 1

Tutorial 5 - Fourier Analysis Made easy - Part 2

Tutorial 6 - Fourier Analysis Made Easy - Part 3

Tutorial 7 - Hilbert Transform and the Complex Envelope

Tutorial 8 - All About Modulation - Part 1

Tutorial 9 - Baseband, Passband and Amplitude Modulation (AM)

Tutorial 10 - All about Traveling Wave Tube Amplifiers (TWTA) and non-linear amplification

Tutorial 11 - Link Budgets 101

Tutorial 12 - Convolutional Coding and Decoding Made Easy

Tutorial 13 - Coding Concepts and Block Coding

Tutorial 14 - Inter Symbol Interference (ISI) and Raised cosine filtering

Tutorial 15 - How to interpret an Eye diagram

Tutorial 16 - Partial Response signaling and Quadrature Partial Response (QPR) modulation

Tutorial 17 - Frequency Modulation (FM) , FSK, MSK and more

Tutorial 18 - Unlocking the Phase Locked Loop (PLL) - Part 1

Tutorial 19 - Unlocking the Phase Locked Loop (PLL) - Part 2

Tutorial 20 - Modulation performance metrics and computation of BER

Tutorial 21 - Linear Time Invariant systems and Matched filtering

Tutorial 22 - Orthogonal Frequency Division Multiplex (OFDM, DMT)

Tutorial 23a - About Lattice and cosets

Tutorial 23b - Trellis coded Modulation (TCM)

Tutorial 24 - Turbo Coding and MAP Decoding, Part 1 ,Part 2 - The MAP decoding algorithm, step-by-step Companion worksheet

Tutorial 25 - CDMA

Tutorial 26 - Filters, analog, digital and adaptive equilization

Design of VLSI Systems

Posted by Hafsal | | CMOS Design, Digital Design, DSP, VLSI, VLSI Design, VLSI DSP | 0 comments »

Hai friends here i attached the links for the detailed description of following subjects

please go through the links

For direct link to 'Table of contents' please clik here

For publications click here

---

• Chapter 1 - Introduction to VLSI Systems
  
  • Historical Perspective
  • VLSI Design Flow
  • Design Hierarchy
  • Concepts of Regularity, Modularity and Locality
  • VLSI Design Styles
• Chapter 2 - CMOS Fabrication Technology and Design Rules
  
  • Introduction
  • Fabrication Process Flow - Basic Steps
  • The CMOS n-Well Process
  • Advanced CMOS Fabrication Technologies
  • Layout Design Rules
• Chapter 3 - Full-Custom Mask Layout System
  
  • Introduction
  • CMOS Layout Design Rules
  • CMOS Inverter Layout Design
  • Layout of CMOS NAND and NOR Gates
  • Complex CMOS Logic Gates
• Chapter 4 - Parasitic Extraction and Performance Estimation from Physical Structure
  
  • Introduction
  • The Reality with Interconnections
  • MOSFET Capacitances
  • Interconnect Capacitance Estimation
  • Interconnect Resistance Estimation
• Chapter 5 - Clock Signals and System Timing
  
  • On-Chip Clock Generation and Distribution
• Chapter 6 - Arithmetic for Digital Systems
  
  • Introduction
  • Notation Systems
  • Principle of Generation and Propagation
  • The 1-bit Full Adder
  • Enhancement Techniques for Adders
  • Multioperand Adders
  • Multiplication
  • Addition and Multiplication in Galois Fields, GF(2n)
• Chapter 7 - Low-Power VLSI Circuits and Systems
  
  • Introduction
  • Overview of Power Consumption
  • Low-Power Design Through Voltage Scaling
  • Estimation and Optimization of Switching Activity
  • Reduction of Switched Capacitance
  • Adiabatic Logic Circuits
• Chapter 8 - Testability of Integrated Systems
  
  • Design Constraints
  • Testing
  • The Rule of Ten
  • Terminology
  • Failures in CMOS
  • Combinational Logic Testing
  • Practical Ad-Hoc DFT Guidelines
  • Scan Design Techniques
• Chapter 9 - Fuzzy Logic Systems
  
  • Systems Considerations
  • Fuzzy Logic Based Control Background
  • Integrated Implementations of Fuzzy Logic Circuits
  • Digital Implementations of Fuzzy Logic Circuits
  • Analog Implementations of Fuzzy Logic Circuits
  • Mixed Digital/Analog Implementations of Fuzzy Systems
  • CAD Automation for Fuzzy Logic Circuits Design
  • Neural Networks Implementing Fuzzy Systems
• Chapter 10 - VLSI For Multimedia Applications - Case Study: Digital TV
  
  • Introduction
  • Digitization Of "TV Functions"
  • Points Of Concern For The Design Methodology
  • Conclusion

• Chapter 11 - VLSI For Telecommunication Systems
  • Introduction
  • Telecommunication Fundamentals
  • General Telecommunication Network Taxonomy
  • Comparison Between Different Switching Techniques
  • ATM Networks
  • Case Study: ATM Switch
  • Case Study: ATM Transmission of Multiplexed-MPEG Streams
  • Conclusion
  • Bibliography

• Chapter 12 - Digital Signal Processing Architectures
  • History
  • Typical DSP Application
  • The FIR Example
  • General Architectures
  • Data Path
  • Addressing
  • Peripherals
  • How is a DSP different from a general-purpose processor
  • Superscalar Architectures
  • References

• Chapter 13 - Architectures for video processing
  • Video Compression
  • MPEG-2 Video Compresion
  • Digital Video and Computer Graphics
  • TV, Computer Graphics and Multimedia: MPEG-4?
  • Video Processing Architectures: Generalities
  • Motion Estimation Case Study
  • IMAGE a Motion Estimation Chip for MPEG-2 applications

Multirate DSP

Posted by Hafsal | | DSP | 0 comments »

As per the request from one viewer................


Multi-rate processing and sample rate conversion, or interpolation and decimation as they re known, are a clever digital signal processing (DSP) techniques that broadband and wireless design engineers can employ during the system design process. Using these techniques, design engineers can gain an added degree of freedom that could improve the overall performance of a system architecture.

Multi-rate processing finds use in signal processing systems where various sub-systems with differing sample or clock rates need to be interfaced together. At other times multi-rate processing is used to reduce computational overhead of a system. For example, an algorithm requires k operations to be completed per cycle. By reducing the sample rate of a signal or system by a factor of M, the arithmetic bandwidth requirements are reduced from kfs operations to kfs/M operations per second.

The above applications provide a glimpse of just a few of the communication applications where using multi-rate processing and sample-rate conversion makes sense. But to implement these techniques, designers must first better understand how they work.

For more details pls go through the link
http://www.commsdesign.com/showArticle.jhtml?articleID=16504259


pdf

www2.ee.ic.ac.uk/hp/staff/pnaylor/notes/DSP5.pdf
www.spsc.tugraz.at/courses/dsplab/multirate/multirate.pdf
eceweb.uccs.edu/wickert/ece5650/notes/sampling_theory/multirate_sim.pdf

ppt

vada.skku.ac.kr/ClassInfo/system_level_design/sdr_slides/Multirate-1.ppt
vada.skku.ac.kr/ClassInfo/system_level_design/sdr_slides/Multirate-2.ppt -